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ATmega128
OUTPUT
Analog
Comparator
The Analog Comparator compares the input values on the positive pin AIN0 and negative pin
AIN1. W hen the voltage on the positive pin AIN0 is higher than the voltage on the negative pin
AIN1, the Analog Comparator Output, ACO, is set. The comparator’s output can be set to trigger
the Timer/Counter1 Input Capture function. In addition, the comparator can trigger a separate
interrupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on com-
parator output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is
shown in Figure 107 .
Figure 107. Analog Comparator Block Diagram
BANDGAP
REFERENCE
ACBG
ACME
ADEN
ADC MULTIPLEXER
1)
Notes:
1. See Table 94 on page 229 .
2. Refer to Figure 1 on page 2 and Table 39 on page 80 for Analog Comparator pin placement.
Special Function IO
Register – SFIOR
Bit
Read/ W rite
Initial Value
7
TSM
R/ W
0
6
–
R
0
5
–
R
0
4
–
R
0
3
ACME
R/ W
0
2
PUD
R/ W
0
1
PSR0
R/ W
0
0
PSR321
R/ W
0
SFIOR
? Bit 3 – ACME: Analog Comparator Multiplexer Enable
W hen this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer selects the negative input to the Analog Comparator. W hen this bit is written
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed
description of this bit, see “Analog Comparator Multiplexed Input” on page 228 .
Analog Comparator
Control and Status
Bit
7
6
5
4
3
2
1
0
Register – ACSR
Read/ W rite
Initial Value
ACD
R/ W
0
ACBG
R/ W
0
ACO
R
N/A
ACI
R/ W
0
ACIE
R/ W
0
ACIC
R/ W
0
ACIS1
R/ W
0
ACIS0
R/ W
0
ACSR
? Bit 7 – ACD: Analog Comparator Disable
W hen this bit is written logic one, the power to the Analog Comparator is switched off. This bit
can be set at any time to turn off the Analog Comparator. This will reduce power consumption in
Active and Idle mode. W hen changing the ACD bit, the Analog Comparator Interrupt must be
227
2467X–AVR–06/11
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